Changes

Perfectly emulating timings right down Emulating components according to the their per-cycle accesses results in cycle-accurate emulation. Each individual component is emulated and mutually synchronised at exactly the right time, in perfect sync and so onsingle-clock resolution, which has a high higher CPU cost. The speed of the emulation depends on the way cycle-accuracy is implemented, and it doesn't necessarily mean 100% accuracy. Even [[higan]] still has issues with the ROM Hack "Mario and Luigi: Kola Kingdom Quest," where it doesn't emulate the text glitch of the level's title. ===Subcycle accuracy===The heartbeat of an IC is its clock signal; a full cycle of the clock signal involves two transitions: from low to high and then back from high to low. Therefore even a chip that is fully synchronised to its clock may not be emulated accurately if it is emulated with only cycle precision as it'll have to bundle together both its rising and falling actions. The [[wikipedia:Zilog_Z80|Z80]] processor offers an example of this: almost all inputs are sampled on a rising clock but the WAIT signal is sampled on a falling clock. E.g. in a standard three-clock-cycle memory access machine cycle the WAIT line is sampled on the final falling clock — 0.5 cycles before the end of the machine cycle. If the Z80 is required to wait, it will sample the WAIT line again at cycle intervals until it spots that it is no longer asserted and complete 0.5 cycles after that. Therefore an emulator that is only cycle accurate will have to sample it either 0.5 cycles early or 0.5 cycles late, and will stop waiting either 0.5 cycles early or 0.5 cycles late, causing a phase error with whatever it was sampling. Worse than that, as the Z80 tests WAIT only once every machine cycle, not every clock cycle, missing it as a result of sampling at the wrong time can cause a net error of four or more cycles. Using the broad brush of cycle accuracy can also cause problems in machines with multiple clock signals — component A being accurate only to the complete clock cycle can leave it as observably inaccurate if component B is running with a quicker clock. Impinging upon chip accuracy, some chips, such as the Commodore 64's [[SID]] are part digital and part analogue. The analogue part can be emulated in a discrete fashion, but it is often desirable to take those discrete steps at a multiple of the clock rate. However the difference is usually not observable to other components in the emulated machine so although this is subcycle accuracy as some part of the state of the chip is known at a precision of greater than one cycle, it doesn't tend to affect the design of the emulator as a whole.